CAD ENGINEER - PDV
Company: Apple
Location: San Diego
Posted on: October 15, 2024
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Job Description:
SummaryPosted: Role Number:200571399Do you love building elegant
solutions to highly complex challenges? Do you intrinsically see
the importance in every detail? As part of our Silicon Technologies
group, you'll help design and manufacture our next-generation,
high-performance, power-efficient processor, system-on-chip (SoC).
You'll ensure Apple products and services can seamlessly and
efficiently handle the tasks that make them beloved by millions!
Joining this group means you'll be responsible for crafting and
building the technology that fuels Apple's devices. Together, you
and your team will enable our customers to do all the things they
love with their devices. As a member of our CAD team, you will
architect, develop, maintain and improve physical design
verification (PDV) flows. The role requires you to work on flow and
runset development for various technology nodes and tool sets.
Working alongside the CAD team, you will be collaborating with the
custom digital/analog/mixed-signal design, physical design (PD) and
chip integration teams. With good understanding of design rule
checks (DRC) and layout versus schematic (LVS) runsets, you will
develop rule decks from scratch and/or modify existing
ones.Description- Develop, improve and maintain various aspects of
physical verification flow and methodology- Coordinate the effort
of validating flows, improving for custom checks and data
generation- Work with the design and PD teams to facilitate the
chip design process- Code custom PDV rule decks such as Electrical
rule checks (ERC) and Programmable ERCs- Collaborate with tool
vendors and foundries for PDK performance enhancementsMinimum
QualificationsPrevious industry experience in Silicon chip design
flowsTapeout support and IP/SOC level PDV debug experience in
various technology nodesScripting skills in programming languages
such as Python, Perl, Tcl, Shell, Makefile or CExperience with flow
automation and development in advanced nodesMinimum requirement of
BS and 10+ years of relevant industry experiencePreferred
QualificationsKnowledge in Calibre/ICV runset coding for
DRC/LVS/ERC/MFILLRule coding in PERC is a plusKnowledge of
parasitic extraction, SKILL coding, and PnR tools is a plusPay &
BenefitsAt Apple, base pay is one part of our total compensation
package and is determined within a range. This provides the
opportunity to progress as you grow and develop within a role. The
base pay range for this role is between $166,600 and $296,300, and
your base pay will depend on your skills, qualifications,
experience, and location.Apple employees also have the opportunity
to become an Apple shareholder through participation in Apple's
discretionary employee stock programs. Apple employees are eligible
for discretionary restricted stock unit awards, and can purchase
Apple stock at a discount if voluntarily participating in Apple's
Employee Stock Purchase Plan. You'll also receive benefits
including: Comprehensive medical and dental coverage, retirement
benefits, a range of discounted products and free services, and for
formal education related to advancing your career at Apple,
reimbursement for certain educational expenses - including tuition.
Additionally, this role might be eligible for discretionary bonuses
or commission payments as well as relocation. Learn more about
Apple Benefits.Note: Apple benefit, compensation and employee stock
programs are subject to eligibility requirements and other terms of
the applicable plan or program.Apple is an equal opportunity
employer that is committed to inclusion and diversity. We take
affirmative action to ensure equal opportunity for all applicants
without regard to race, color, religion, sex, sexual orientation,
gender identity, national origin, disability, Veteran status, or
other legally protected characteristics. Learn more about your EEO
rights as an applicant.
Keywords: Apple, Chula Vista , CAD ENGINEER - PDV, Design, Graphic Design & CAD , San Diego, California
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